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Virtual ESD testing

Objectives

Electronic systems can be disturbed or destructed by electrostatic discharges (ESD) caused by charged persons or devices. Especially semiconductors are affected and special ESD testing is necessary. Anticipated ESD signals for different environments in the application of ICs are specified in component- and system-level standards.

ESD simulation is a helpful tool to estimate the ESD robustness of electronic systems in early development states. Powerful models of all components are required which have to be taken into account in the simulation chain. The following topics are investigated in this context:

  • • Individual models of ESD testing devices
  • • Simulation of on-PCB ESD pulse propagation
  • • Models and methods for cable discharge events
  • • Models of discrete ESD protection devices (diode, varistor, polymer...)
  • • High-current behavior of ICs
  • • Failure behavior of ICs
  • • Transient fields of ESD

Methods

Modeling ESD generator

For ESD testing electrostatic discharges, which simulate a discharge of a human body, are performed after the IEC 61000-4-2 or ISO 10605 standards. Often ESD testing results show a dependency on the applied ESD generator. Small constructional differences between the standardized ESD pulse sources might result in very different pulse shapes if other load impedances than specified in the standard are connected. For virtual ESD testing individual models of ESD pulse generators are required. Special modeling techniques based on measurement methods are investigated.

Modeling the IC ESD robustness

The behavior of ICs in case of ESD can be characterized by measurement with transmission line pulser (TLP). The static and dynamic behavior of single ICs can be modeled based on measurement data up to very high current amplitudes. Recent investigation results focus on modeling the IC failure behavior.

Additional information

Comparing Cable Discharge Events to IEC 61000-4-2 or ISO 10605 Discharges

Vergleich von ESD-System-Level Testmethoden für Packaging und Handling

Vergleichbarkeit von ESD-Prüfungen auf IC- und Systemebene oder welchen Einfluss hat eine Reduzierung der IC-ESD-Festigkeit auf die Systemfestigkeit?

Modellierung und Simulation von ESD-Schutzelementen mit VHDL-AMS

Charakterisierung und systematische Bewertung von externen ESD Schutzelementen

Impact of Setup and Pulse Generator on Automotive Component ESD Testing Results

Virtual ESD testing of automotive electronic systems

A Combined Impedance Measurement Method for ESD Generator Modeling 

ESDsimulation
ESD tip


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Contact

Prof. Dr.-Ing. Stephan Frei
Head of chair
Tel.: 0231 755-5980